Commit 72b5626d authored by Heinrich Schuchardt's avatar Heinrich Schuchardt Committed by Tomasz Zawadzki
Browse files

nvme/pcie: memory barrier for RISC-V 



Play it safe and add the same memory barrier in
nvme_pcie_qpair_process_completions() as for ppc64.

Signed-off-by: default avatarHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Change-Id: I7079b4769d30106387ef4549495a72b7fea6a77a
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12879


Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com>
Community-CI: Mellanox Build Bot
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
Reviewed-by: default avatarAleksey Marchuk <alexeymar@nvidia.com>
parent c1e0b73e

lib/nvme/nvme_pcie_common.c

+1 −1
Original line number Diff line number Diff line
@@ -932,7 +932,7 @@ nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_ 
			__builtin_prefetch(&pqpair->tr[next_cpl->cid]);

		}



#ifdef __PPC64__

#if defined(__PPC64__) || defined(__riscv)

		/*

		 * This memory barrier prevents reordering of:

		 * - load after store from/to tr