Commit c1e0b73e authored by Heinrich Schuchardt's avatar Heinrich Schuchardt Committed by Tomasz Zawadzki
Browse files

barrier: RISC-V memory barriers 



Introduce memory barriers for RISC-V.

Signed-off-by: default avatarHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Change-Id: I6761c2b6ddc28a856cac1e1a67e0b0fa0e0ab3a0
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/12878


Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com>
Community-CI: Mellanox Build Bot
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
Reviewed-by: default avatarAleksey Marchuk <alexeymar@nvidia.com>
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
parent 8d515e02

include/spdk/barrier.h

+10 −0
Original line number Diff line number Diff line
@@ -103,6 +103,16 @@ extern "C" { 
#endif

#define _spdk_ivdt_dcache(pdata)



#elif defined(__riscv)



#define _spdk_rmb()	__asm__ __volatile__("fence ir, ir" ::: "memory")

#define _spdk_wmb()	__asm__ __volatile__("fence ow, ow" ::: "memory")

#define _spdk_mb()	__asm__ __volatile__("fence iorw, iorw" ::: "memory")

#define _spdk_smp_rmb()	__asm__ __volatile__("fence r, r" ::: "memory")

#define _spdk_smp_wmb()	__asm__ __volatile__("fence w, w" ::: "memory")

#define _spdk_smp_mb()	__asm__ __volatile__("fence rw, rw" ::: "memory")

#define _spdk_ivdt_dcache(pdata)



#else



#define _spdk_rmb()