Commit ff386978 authored by Daniel Verkamp's avatar Daniel Verkamp
Browse files

nvme: add transport ctrlr_enable function



Move the PCIe-specific admin queue setup to nvme_pcie_ctrlr_enable.

Change-Id: Ic3f5625fa804f719040ba86b7fc3bf82fcc057c0
Signed-off-by: default avatarDaniel Verkamp <daniel.verkamp@intel.com>
parent 51b96642
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+7 −42
Original line number Diff line number Diff line
@@ -72,27 +72,6 @@ nvme_ctrlr_set_cc(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_cc_regist
			cc->raw);
}

static int
nvme_ctrlr_set_asq(struct spdk_nvme_ctrlr *ctrlr, uint64_t value)
{
	return ctrlr->transport->ctrlr_set_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, asq),
			value);
}

static int
nvme_ctrlr_set_acq(struct spdk_nvme_ctrlr *ctrlr, uint64_t value)
{
	return ctrlr->transport->ctrlr_set_reg_8(ctrlr, offsetof(struct spdk_nvme_registers, acq),
			value);
}

static int
nvme_ctrlr_set_aqa(struct spdk_nvme_ctrlr *ctrlr, const union spdk_nvme_aqa_register *aqa)
{
	return ctrlr->transport->ctrlr_set_reg_4(ctrlr, offsetof(struct spdk_nvme_registers, aqa.raw),
			aqa->raw);
}

void
spdk_nvme_ctrlr_opts_set_defaults(struct spdk_nvme_ctrlr_opts *opts)
{
@@ -380,7 +359,13 @@ static int
nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
{
	union spdk_nvme_cc_register	cc;
	union spdk_nvme_aqa_register	aqa;
	int				rc;

	rc = ctrlr->transport->ctrlr_enable(ctrlr);
	if (rc != 0) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "transport ctrlr_enable failed\n");
		return rc;
	}

	if (nvme_ctrlr_get_cc(ctrlr, &cc)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "get_cc() failed\n");
@@ -392,26 +377,6 @@ nvme_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
		return -EINVAL;
	}

	if (nvme_ctrlr_set_asq(ctrlr, ctrlr->adminq->cmd_bus_addr)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_asq() failed\n");
		return -EIO;
	}

	if (nvme_ctrlr_set_acq(ctrlr, ctrlr->adminq->cpl_bus_addr)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_acq() failed\n");
		return -EIO;
	}

	aqa.raw = 0;
	/* acqs and asqs are 0-based. */
	aqa.bits.acqs = ctrlr->adminq->num_entries - 1;
	aqa.bits.asqs = ctrlr->adminq->num_entries - 1;

	if (nvme_ctrlr_set_aqa(ctrlr, &aqa)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_aqa() failed\n");
		return -EIO;
	}

	cc.bits.en = 1;
	cc.bits.css = 0;
	cc.bits.shn = 0;
+2 −0
Original line number Diff line number Diff line
@@ -253,6 +253,8 @@ struct spdk_nvme_transport {
	struct spdk_nvme_ctrlr *(*ctrlr_construct)(void *devhandle);
	void (*ctrlr_destruct)(struct spdk_nvme_ctrlr *ctrlr);

	int (*ctrlr_enable)(struct spdk_nvme_ctrlr *ctrlr);

	int (*ctrlr_get_pci_id)(struct spdk_nvme_ctrlr *ctrlr, struct pci_id *pci_id);

	int (*ctrlr_set_reg_4)(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint32_t value);
+52 −0
Original line number Diff line number Diff line
@@ -128,6 +128,27 @@ nvme_pcie_ctrlr_get_reg_8(struct spdk_nvme_ctrlr *ctrlr, uint32_t offset, uint64
	return 0;
}

static int
nvme_pcie_ctrlr_set_asq(struct nvme_pcie_ctrlr *pctrlr, uint64_t value)
{
	return nvme_pcie_ctrlr_set_reg_8(&pctrlr->ctrlr, offsetof(struct spdk_nvme_registers, asq),
					 value);
}

static int
nvme_pcie_ctrlr_set_acq(struct nvme_pcie_ctrlr *pctrlr, uint64_t value)
{
	return nvme_pcie_ctrlr_set_reg_8(&pctrlr->ctrlr, offsetof(struct spdk_nvme_registers, acq),
					 value);
}

static int
nvme_pcie_ctrlr_set_aqa(struct nvme_pcie_ctrlr *pctrlr, const union spdk_nvme_aqa_register *aqa)
{
	return nvme_pcie_ctrlr_set_reg_4(&pctrlr->ctrlr, offsetof(struct spdk_nvme_registers, aqa.raw),
					 aqa->raw);
}

static int
nvme_pcie_ctrlr_get_cmbloc(struct nvme_pcie_ctrlr *pctrlr, union spdk_nvme_cmbloc_register *cmbloc)
{
@@ -333,6 +354,35 @@ static struct spdk_nvme_ctrlr *nvme_pcie_ctrlr_construct(void *devhandle)
	return &pctrlr->ctrlr;
}

static int
nvme_pcie_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
{
	struct nvme_pcie_ctrlr *pctrlr = nvme_pcie_ctrlr(ctrlr);
	union spdk_nvme_aqa_register aqa;

	if (nvme_pcie_ctrlr_set_asq(pctrlr, ctrlr->adminq->cmd_bus_addr)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_asq() failed\n");
		return -EIO;
	}

	if (nvme_pcie_ctrlr_set_acq(pctrlr, ctrlr->adminq->cpl_bus_addr)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_acq() failed\n");
		return -EIO;
	}

	aqa.raw = 0;
	/* acqs and asqs are 0-based. */
	aqa.bits.acqs = ctrlr->adminq->num_entries - 1;
	aqa.bits.asqs = ctrlr->adminq->num_entries - 1;

	if (nvme_pcie_ctrlr_set_aqa(pctrlr, &aqa)) {
		SPDK_TRACELOG(SPDK_TRACE_NVME, "set_aqa() failed\n");
		return -EIO;
	}

	return 0;
}

static void
nvme_pcie_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
{
@@ -1282,6 +1332,8 @@ const struct spdk_nvme_transport spdk_nvme_transport_pcie = {
	.ctrlr_construct = nvme_pcie_ctrlr_construct,
	.ctrlr_destruct = nvme_pcie_ctrlr_destruct,

	.ctrlr_enable = nvme_pcie_ctrlr_enable,

	.ctrlr_get_pci_id = nvme_pcie_ctrlr_get_pci_id,

	.ctrlr_set_reg_4 = nvme_pcie_ctrlr_set_reg_4,
+8 −0
Original line number Diff line number Diff line
@@ -67,6 +67,12 @@ ut_ctrlr_destruct(struct spdk_nvme_ctrlr *ctrlr)
{
}

static int
ut_ctrlr_enable(struct spdk_nvme_ctrlr *ctrlr)
{
	return 0;
}

static int
ut_ctrlr_get_pci_id(struct spdk_nvme_ctrlr *ctrlr, struct pci_id *pci_id)
{
@@ -146,6 +152,8 @@ static const struct spdk_nvme_transport nvme_ctrlr_ut_transport = {
	.ctrlr_construct = ut_ctrlr_construct,
	.ctrlr_destruct = ut_ctrlr_destruct,

	.ctrlr_enable = ut_ctrlr_enable,

	.ctrlr_get_pci_id = ut_ctrlr_get_pci_id,

	.ctrlr_set_reg_4 = ut_ctrlr_set_reg_4,