Commit f31ad9b6 authored by paul luse's avatar paul luse Committed by Jim Harris
Browse files

lib/idxd: add cache control flag to op codes that support it 



Perf improvement, directs DSA to write to cache as opposed to
mem.

Signed-off-by: default avatarpaul luse <paul.e.luse@intel.com>
Change-Id: I0d6ba157af8f1b54f8aae3b8e54a6f7754e4a9de
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/8169


Community-CI: Mellanox Build Bot
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
Reviewed-by: default avatarBen Walker <benjamin.walker@intel.com>
parent 3e2e2a57

lib/idxd/idxd.c

+3 −0
Original line number Diff line number Diff line
@@ -473,6 +473,7 @@ spdk_idxd_submit_copy(struct spdk_idxd_io_channel *chan, void *dst, const void * 
	desc->src_addr = src_addr;

	desc->dst_addr = dst_addr;

	desc->xfer_size = nbytes;

	desc->flags |= IDXD_FLAG_CACHE_CONTROL; /* direct IO to CPU cache instead of mem */



	/* Submit operation. */

	movdir64b(chan->portal, desc);
@@ -522,6 +523,7 @@ spdk_idxd_submit_dualcast(struct spdk_idxd_io_channel *chan, void *dst1, void *d 
	desc->dst_addr = dst1_addr;

	desc->dest2 = dst2_addr;

	desc->xfer_size = nbytes;

	desc->flags |= IDXD_FLAG_CACHE_CONTROL; /* direct IO to CPU cache instead of mem */



	/* Submit operation. */

	movdir64b(chan->portal, desc);
@@ -591,6 +593,7 @@ spdk_idxd_submit_fill(struct spdk_idxd_io_channel *chan, void *dst, uint64_t fil 
	desc->pattern = fill_pattern;

	desc->dst_addr = dst_addr;

	desc->xfer_size = nbytes;

	desc->flags |= IDXD_FLAG_CACHE_CONTROL; /* direct IO to CPU cache instead of mem */



	/* Submit operation. */

	movdir64b(chan->portal, desc);