Commit e2063954 authored by Daniel Verkamp's avatar Daniel Verkamp Committed by Gerrit Code Review
Browse files

nvme_spec: declare CSTS with the correct type 



nvme_spec.h already has a structure with the correct bitfields for the
CSTS register, so use it in struct spdk_nvme_registers.

Change-Id: Id0663aee2611fb5195f9012a3176799e32701bb0
Signed-off-by: default avatarDaniel Verkamp <daniel.verkamp@intel.com>
parent 8acc50fc

include/spdk/nvme_spec.h

+1 −1
Original line number Diff line number Diff line
@@ -242,7 +242,7 @@ struct spdk_nvme_registers { 
	union spdk_nvme_cc_register	cc;



	uint32_t	reserved1;

	uint32_t	csts;		/* controller status */

	union spdk_nvme_csts_register	csts;		/* controller status */

	uint32_t	nssr;		/* NVM subsystem reset */



	/** admin queue attributes */

lib/nvme/nvme_ctrlr.c

+6 −6
Original line number Diff line number Diff line
@@ -258,7 +258,7 @@ nvme_ctrlr_wait_for_ready(struct spdk_nvme_ctrlr *ctrlr, int desired_ready_value 
	cap_lo.raw = nvme_mmio_read_4(ctrlr, cap_lo.raw);

	ready_timeout_in_ms = cap_lo.bits.to * 500;



	csts.raw = nvme_mmio_read_4(ctrlr, csts);

	csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);



	ms_waited = 0;
@@ -269,7 +269,7 @@ nvme_ctrlr_wait_for_ready(struct spdk_nvme_ctrlr *ctrlr, int desired_ready_value 
				    "within %d ms\n", desired_ready_value, ready_timeout_in_ms);

			return ENXIO;

		}

		csts.raw = nvme_mmio_read_4(ctrlr, csts);

		csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);

	}



	return 0;
@@ -282,7 +282,7 @@ nvme_ctrlr_disable(struct spdk_nvme_ctrlr *ctrlr) 
	union spdk_nvme_csts_register csts;



	cc.raw = nvme_mmio_read_4(ctrlr, cc.raw);

	csts.raw = nvme_mmio_read_4(ctrlr, csts);

	csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);



	if (cc.bits.en == 1 && csts.bits.rdy == 0) {

		nvme_ctrlr_wait_for_ready(ctrlr, 1);
@@ -305,7 +305,7 @@ nvme_ctrlr_shutdown(struct spdk_nvme_ctrlr *ctrlr) 
	cc.bits.shn = SPDK_NVME_SHN_NORMAL;

	nvme_mmio_write_4(ctrlr, cc.raw, cc.raw);



	csts.raw = nvme_mmio_read_4(ctrlr, csts);

	csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);

	/*

	 * The NVMe spec does not define a timeout period

	 *  for shutdown notification, so we just pick
@@ -314,7 +314,7 @@ nvme_ctrlr_shutdown(struct spdk_nvme_ctrlr *ctrlr) 
	 */

	while (csts.bits.shst != SPDK_NVME_SHST_COMPLETE) {

		nvme_delay(1000);

		csts.raw = nvme_mmio_read_4(ctrlr, csts);

		csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);

		if (ms_waited++ >= 5000)

			break;

	}
@@ -728,7 +728,7 @@ nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr) 
	int rc;



	cc.raw = nvme_mmio_read_4(ctrlr, cc.raw);

	csts.raw = nvme_mmio_read_4(ctrlr, csts);

	csts.raw = nvme_mmio_read_4(ctrlr, csts.raw);

	cap_lo.raw = nvme_mmio_read_4(ctrlr, cap_lo.raw);



	ready_timeout_in_ms = 500 * cap_lo.bits.to;