Commit d3f661cf authored by Ben Walker's avatar Ben Walker Committed by Tomasz Zawadzki
Browse files

nvme/pcie: Don't store cmb.end



This isn't actually necessary.

Change-Id: Ic229b44f4eaf628a468fa8c2fa526162e426ec57
Signed-off-by: default avatarBen Walker <benjamin.walker@intel.com>
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/789


Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarShuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: default avatarChangpeng Liu <changpeng.liu@intel.com>
Reviewed-by: default avatarDarek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
parent 9ad044c4
Loading
Loading
Loading
Loading
+0 −4
Original line number Diff line number Diff line
@@ -87,9 +87,6 @@ struct nvme_pcie_ctrlr {
		/* Current offset of controller memory buffer, relative to start of BAR virt addr */
		uint64_t current_offset;

		/* Last valid offset into CMB, this differs if CMB memory registration occurs or not */
		uint64_t end;

		void *mem_register_addr;
		size_t mem_register_size;
	} cmb;
@@ -520,7 +517,6 @@ nvme_pcie_ctrlr_map_cmb(struct nvme_pcie_ctrlr *pctrlr)
	pctrlr->cmb.bar_pa = bar_phys_addr;
	pctrlr->cmb.size = size;
	pctrlr->cmb.current_offset = offset;
	pctrlr->cmb.end = offset + size;

	if (!cmbsz.bits.sqs) {
		pctrlr->ctrlr.opts.use_cmb_sqs = false;