Commit b5b9410d authored by Jim Harris's avatar Jim Harris Committed by Ben Walker
Browse files

nvme: remove DELAY_BEFORE_ENABLE quirk and always wait 100us



A 100us is so small that applying the quirk to the specific
SSDs that require the delay is more trouble than it is worth.
So remove the quirk and always wait 100us before re-enabling
the NVMe SSD during initialization.

Signed-off-by: default avatarJim Harris <james.r.harris@intel.com>
Change-Id: Id6a8cc6e35d103fffdf135580301fc3e5b27e722
parent c3c851f6
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+5 −6
Original line number Diff line number Diff line
@@ -1207,12 +1207,11 @@ nvme_ctrlr_process_init(struct spdk_nvme_ctrlr *ctrlr)
		if (csts.bits.rdy == 0) {
			SPDK_TRACELOG(SPDK_TRACE_NVME, "CC.EN = 0 && CSTS.RDY = 0\n");
			nvme_ctrlr_set_state(ctrlr, NVME_CTRLR_STATE_ENABLE, ready_timeout_in_ms);

			if (ctrlr->quirks & NVME_QUIRK_DELAY_BEFORE_ENABLE) {
				SPDK_TRACELOG(SPDK_TRACE_NVME, "Applying quirk: Delay 100us before enabling.\n");
				ctrlr->sleep_timeout_tsc = spdk_get_ticks() + spdk_get_ticks_hz() / 10000;
			}

			/*
			 * Delay 100us before setting CC.EN = 1.  Some NVMe SSDs miss CC.EN getting
			 *  set to 1 if it is too soon after CSTS.RDY is reported as 0.
			 */
			spdk_delay_us(100);
			return 0;
		}
		break;
+0 −7
Original line number Diff line number Diff line
@@ -89,13 +89,6 @@
 */
#define NVME_INTEL_QUIRK_STRIPING 0x8

/*
 * A small delay is required before re-enabling a controller.
 * The delay required is often vanishingly small, such that
 * many drivers do not ever encounter the problem.
 */
#define NVME_QUIRK_DELAY_BEFORE_ENABLE 0x10

#define NVME_MAX_ASYNC_EVENTS	(8)

#define NVME_MIN_TIMEOUT_PERIOD		(5)
+1 −2
Original line number Diff line number Diff line
@@ -42,8 +42,7 @@ static const struct nvme_quirk nvme_quirks[] = {
	{	{SPDK_PCI_VID_INTEL, 0x0953, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
		NVME_INTEL_QUIRK_READ_LATENCY |
		NVME_INTEL_QUIRK_WRITE_LATENCY |
		NVME_INTEL_QUIRK_STRIPING |
		NVME_QUIRK_DELAY_BEFORE_ENABLE
		NVME_INTEL_QUIRK_STRIPING
	},
	{	{SPDK_PCI_VID_INTEL, 0x0A53, SPDK_PCI_ANY_ID, SPDK_PCI_ANY_ID},
		NVME_INTEL_QUIRK_STRIPING
+0 −1
Original line number Diff line number Diff line
@@ -50,7 +50,6 @@ struct nvme_driver _g_nvme_driver = {
	.lock = PTHREAD_MUTEX_INITIALIZER,
};

uint64_t g_ut_tsc = 0;
struct spdk_nvme_registers g_ut_nvme_regs = {};

__thread int    nvme_thread_ioq_index = -1;
+5 −0
Original line number Diff line number Diff line
@@ -157,6 +157,11 @@ uint64_t spdk_get_ticks_hz(void)
	return 1000000;
}

void spdk_delay_us(unsigned int us)
{
	ut_tsc += us;
}

int
spdk_pci_addr_parse(struct spdk_pci_addr *addr, const char *bdf)
{