Commit 9b172afd authored by Dariusz Stojaczyk's avatar Dariusz Stojaczyk Committed by Jim Harris
Browse files

ioat: clear the internal channel error register on reset 



I/OAT device will refuse to resume from the Halted
state until we clear both CHANERR and CHANERR_INT
registers.

We only cleared CHANERR so far. So after the I/OAT
device encountered an error, SPDK would not be able
to initialize it ever again unless it's rebound to
the ioatdma driver.

Unlike CHANERR, CHANERR_INT is only accessible through
PCI config space.

CHANERR_INT is only available on I/OAT devices with
version < 3.3.

Change-Id: Ib369ca76f58c4868fe61ff9532b2e7947e5091d3
Signed-off-by: default avatarDariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-on: https://review.gerrithub.io/422026


Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com>
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarBen Walker <benjamin.walker@intel.com>
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
parent db5d6f4f

include/spdk/ioat_spec.h

+2 −0
Original line number Diff line number Diff line
@@ -47,6 +47,8 @@ extern "C" { 


#include "spdk/assert.h"



#define SPDK_IOAT_PCI_CHANERR_INT_OFFSET	0x180



#define SPDK_IOAT_INTRCTRL_MASTER_INT_EN	0x01



#define SPDK_IOAT_VER_3_0                0x30

lib/ioat/ioat.c

+13 −0
Original line number Diff line number Diff line
@@ -259,6 +259,7 @@ static int ioat_reset_hw(struct spdk_ioat_chan *ioat) 
	int timeout;

	uint64_t status;

	uint32_t chanerr;

	int rc;



	status = ioat_get_chansts(ioat);

	if (is_ioat_active(status) || is_ioat_idle(status)) {
@@ -283,6 +284,18 @@ static int ioat_reset_hw(struct spdk_ioat_chan *ioat) 
	chanerr = ioat->regs->chanerr;

	ioat->regs->chanerr = chanerr;



	if (ioat->regs->cbver < SPDK_IOAT_VER_3_3) {

		rc = spdk_pci_device_cfg_read32(ioat->device, &chanerr,

						SPDK_IOAT_PCI_CHANERR_INT_OFFSET);

		if (rc) {

			SPDK_ERRLOG("failed to read the internal channel error register\n");

			return -1;

		}



		spdk_pci_device_cfg_write32(ioat->device, chanerr,

					    SPDK_IOAT_PCI_CHANERR_INT_OFFSET);

	}



	ioat_reset(ioat);



	timeout = 20;