Commit 9945c00c authored by Cunyin Chang's avatar Cunyin Chang
Browse files

NVMe: Add public API to get log pages.



1 Add supported log pages data structure.
2 Bulid up supported log pages when NVME start.
3 Provide unified API for getting log pages.
3 Unit test suit optimization base on above modification.

Change-Id: I03cdb93f5c94e6897510d7f19bc7d9f4e70f9222
Signed-off-by: default avatarCunyin Chang <cunyin.chang@intel.com>
parent b61b0990
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+26 −0
Original line number Diff line number Diff line
@@ -107,6 +107,13 @@ const struct nvme_controller_data *nvme_ctrlr_get_data(struct nvme_controller *c
 */
uint32_t nvme_ctrlr_get_num_ns(struct nvme_controller *ctrlr);

/**
 * \brief Figure out if it is supported for the given NVMe controller and page identifier.
 *
 * This function is thread safe and can be called at any point after nvme_attach().
 */
bool nvme_ctrlr_is_log_page_supported(struct nvme_controller *ctrlr, int log_page);

/**
 * Signature for callback function invoked when a command is completed.
 *
@@ -219,6 +226,25 @@ struct nvme_namespace;
 */
struct nvme_namespace *nvme_ctrlr_get_ns(struct nvme_controller *ctrlr, uint32_t ns_id);

/**
 * \brief Get a specific log page from the NVMe controllerr.
 *
 * This function can be called at any point after nvme_attach().
 * \param log_page - the log page identifier.
 * \param nsid - this is one of the cases where NVME_GLOBAL_NAMESPACE_TAG can
 * be used for certain log pages.
 * \param payload - the pointer to the payload buffer.
 * \param payload_size - the size of payload buffer.
 * \param cb_fn - call back funciton pointer which will be called after get log page.
 * \param cb_arg - input parameter for the cb_fn.
 * Call \ref nvme_ctrlr_process_admin_completions() to poll for completion
 * of commands submitted through this function.
 */
void nvme_ctrlr_cmd_get_log_page(struct nvme_controller *ctrlr,
				 uint8_t log_page, uint32_t nsid,
				 void *payload, uint32_t payload_size,
				 nvme_cb_fn_t cb_fn, void *cb_arg);

/**
 * \brief Get the identify namespace data as defined by the NVMe specification.
 *
+14 −0
Original line number Diff line number Diff line
@@ -81,6 +81,20 @@ enum nvme_intel_smart_attribute_code {
	NVME_INTEL_SMART_HOST_BYTES_WRITTEN			= 0xF5,
};

struct nvme_intel_log_page_directory {
	uint8_t		version[2];
	uint8_t		reserved[384];
	uint8_t		read_latency_log_len;
	uint8_t		reserved2;
	uint8_t		write_latency_log_len;
	uint8_t		reserved3[5];
	uint8_t		temperature_statistics_log_len;
	uint8_t		reserved4[9];
	uint8_t		smart_log_len;
	uint8_t		reserved5[107];
};
SPDK_STATIC_ASSERT(sizeof(struct nvme_intel_log_page_directory) == 512, "Incorrect size");

struct nvme_intel_rw_latency_page {
	uint16_t		major_revison;
	uint16_t		minor_revison;
+8 −4
Original line number Diff line number Diff line
@@ -573,8 +573,9 @@ struct __attribute__((packed)) nvme_controller_data {
	struct {
		/* per namespace smart/health log page */
		uint8_t		ns_smart : 1;

		uint8_t		lpa_rsvd : 7;
		/* command effects log page */
		uint8_t		celp : 1;
		uint8_t		lpa_rsvd : 6;
	} lpa;

	/** error log page entries */
@@ -876,8 +877,11 @@ enum nvme_log_page {
	NVME_LOG_ERROR			= 0x01,
	NVME_LOG_HEALTH_INFORMATION	= 0x02,
	NVME_LOG_FIRMWARE_SLOT		= 0x03,
	/* 0x04-0x7F - reserved */
	/* 0x80-0xBF - I/O command set specific */
	NVME_LOG_CHANGED_NS_LIST	= 0x04,
	NVME_LOG_COMMAND_EFFECTS_LOG	= 0x05,
	/* 0x06-0x7F - reserved */
	NVME_LOG_RESERVATION_NOTIFICATION	= 0x80,
	/* 0x81-0xBF - I/O command set specific */
	/* 0xC0-0xFF - vendor specific */
};

include/spdk/pci_ids.h

0 → 100644
+39 −0
Original line number Diff line number Diff line
/*-
 *   BSD LICENSE
 *
 *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
 *   All rights reserved.
 *
 *   Redistribution and use in source and binary forms, with or without
 *   modification, are permitted provided that the following conditions
 *   are met:
 *
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in
 *       the documentation and/or other materials provided with the
 *       distribution.
 *     * Neither the name of Intel Corporation nor the names of its
 *       contributors may be used to endorse or promote products derived
 *       from this software without specific prior written permission.
 *
 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __PCI_IDS_H__
#define __PCI_IDS_H__

#define PCI_VENDOR_ID_INTEL	0x8086

#endif /* __PCI_IDS_H__ */
+2 −2
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@
#ifndef __IOAT_PCI_H__
#define __IOAT_PCI_H__

#include "spdk/pci_ids.h"

#define PCI_DEVICE_ID_INTEL_IOAT_SNB0	0x3c20
#define PCI_DEVICE_ID_INTEL_IOAT_SNB1	0x3c21
#define PCI_DEVICE_ID_INTEL_IOAT_SNB2	0x3c22
@@ -88,7 +90,5 @@
#define PCI_DEVICE_ID_INTEL_IOAT_BDX8	0x6f2e
#define PCI_DEVICE_ID_INTEL_IOAT_BDX9	0x6f2f

#define PCI_VENDOR_ID_INTEL	0x8086

#endif /* __IOAT_PCI_H__ */
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