Commit 84c03605 authored by Tomasz Zawadzki's avatar Tomasz Zawadzki
Browse files

lib/idxd: match batch refcnt and index to match DSA spec 



DSA 2.0 spec defines the size of Maximum Supported Batch Size
as 4 bits (see 9.2.2 General Capabilities Register).
Batch index and refcnt was just an uint8_t that couldn't fit
all possible values.

Right now the batch size is set to DESC_PER_BATCH,
but it could be configurable or taken from the aforementioned
General Cap register.

Signed-off-by: default avatarTomasz Zawadzki <tomasz.zawadzki@intel.com>
Change-Id: Iaffe37e587f95c7b841decb4dea6f30d220fbf5f
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/21242


Reviewed-by: default avatarKonrad Sztyber <konrad.sztyber@intel.com>
Community-CI: Mellanox Build Bot
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarSlawomir Ptak <slawomir.ptak@intel.com>
Reviewed-by: default avatarJim Harris <jim.harris@samsung.com>
parent a681f8d5

lib/idxd/idxd.c

+2 −2
Original line number Diff line number Diff line
@@ -514,7 +514,7 @@ idxd_batch_cancel(struct spdk_idxd_io_channel *chan, int status) 
	batch = chan->batch;

	assert(batch != NULL);



	if (batch->index == UINT8_MAX) {

	if (batch->index == UINT16_MAX) {

		SPDK_ERRLOG("Cannot cancel batch, already submitted to HW.\n");

		return -EINVAL;

	}
@@ -581,7 +581,7 @@ idxd_batch_submit(struct spdk_idxd_io_channel *chan, 
			STAILQ_INSERT_TAIL(&chan->ops_outstanding, (struct idxd_ops *)&batch->user_ops[i],

					   link);

		}

		batch->index = UINT8_MAX;

		batch->index = UINT16_MAX;

	}



	chan->batch = NULL;

lib/idxd/idxd_internal.h

+2 −2
Original line number Diff line number Diff line
@@ -53,8 +53,8 @@ struct idxd_batch { 
	struct idxd_hw_desc		*user_desc;

	struct idxd_ops			*user_ops;

	uint64_t			user_desc_addr;

	uint8_t				index;

	uint8_t				refcnt;

	uint16_t			index;

	uint16_t			refcnt;

	struct spdk_idxd_io_channel	*chan;

	TAILQ_ENTRY(idxd_batch)		link;

};