Commit 7cd3a6f5 authored by heyang's avatar heyang Committed by Jim Harris
Browse files

nvme: add memory barrier in completion path for arm64 



Add a memory barrier for arm64 to prevent possible reordering
of tracker and cpl access,
because arm64 has less strict memory ordering behavior than x86.

Change-Id: I0a8716f7bfeffb0bbce27ee3174e214c8e4566b4
Signed-off-by: default avatarheyang <heyang18@huawei.com>
Reviewed-on: https://review.gerrithub.io/c/442964


Reviewed-by: default avatarShuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: default avatarDarek Stojaczyk <dariusz.stojaczyk@intel.com>
Reviewed-by: default avatarBen Walker <benjamin.walker@intel.com>
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
parent 80ff32cf

lib/nvme/nvme_pcie.c

+1 −1
Original line number Diff line number Diff line
@@ -2076,7 +2076,7 @@ nvme_pcie_qpair_process_completions(struct spdk_nvme_qpair *qpair, uint32_t max_ 
		if (cpl->status.p != pqpair->phase) {

			break;

		}

#ifdef __PPC64__

#if defined(__PPC64__) || defined(__aarch64__)

		/*

		 * This memory barrier prevents reordering of:

		 * - load after store from/to tr