Commit 7188bb99 authored Sep 11, 2019 by Benjamin Saunders Committed by Ben Walker Sep 17, 2019

nvme: fix missing memory barrier in shadow doorbell update

If the CPU reorders the eventidx read before the shadow doorbell
write, it is indeterminate whether the controller will read the
updated shadow doorbell without an MMIO write. See
https://lkml.org/lkml/2018/8/14/1031

 for details.

Signed-off-by: Benjamin Saunders <bsaunders@google.com>
Change-Id: I5aa08fdd5b32c7b81e8048ca6efe546318d80b5c
Reviewed-on: https://review.gerrithub.io/c/spdk/spdk/+/468188


Reviewed-by: Changpeng Liu <changpeng.liu@intel.com>
Reviewed-by: Ben Walker <benjamin.walker@intel.com>
Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>

parent 8126509c

lib/nvme/nvme_pcie.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -1231,6 +1231,12 @@ nvme_pcie_qpair_update_mmio_required(struct spdk_nvme_qpair *qpair, uint16_t val
		old = *shadow_db;
		*shadow_db = value;

		/*
		* Ensure that the doorbell is updated before reading the EventIdx from
		* memory
		*/
		spdk_mb();

		if (!nvme_pcie_qpair_need_event(*eventidx, value, old)) {
		return false;
		}