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This will simplify some future patches which will account for missed timeslice timers by allowing additional IO/BW in the following timeslice. Signed-off-by:Jim Harris <james.r.harris@intel.com> Change-Id: I9dd46a768c98ce267c733a9f9719a2d3d2c3c915 Reviewed-on: https://review.gerrithub.io/423579 Tested-by:
SPDK CI Jenkins <sys_sgci@intel.com> Chandler-Test-Pool: SPDK Automated Test System <sys_sgsw@intel.com> Reviewed-by:
GangCao <gang.cao@intel.com> Reviewed-by:
Changpeng Liu <changpeng.liu@intel.com> Reviewed-by:
Ben Walker <benjamin.walker@intel.com> Reviewed-by:
Shuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>