Commit 47f8f398 authored by Jacek Kalwas's avatar Jacek Kalwas Committed by Tomasz Zawadzki
Browse files

accel: add key size to cipher support check 



Signed-off-by: default avatarJacek Kalwas <jacek.kalwas@intel.com>
Change-Id: I9e26405a1389ed4573ef3d32f4c99031c8d81c96
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/18197


Reviewed-by: default avatarAleksey Marchuk <alexeymar@nvidia.com>
Community-CI: Mellanox Build Bot
Reviewed-by: default avatarJim Harris <james.r.harris@intel.com>
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
Reviewed-by: default avatarKonrad Sztyber <konrad.sztyber@intel.com>
parent e72f6652

include/spdk/accel.h

+3 −0
Original line number Diff line number Diff line
@@ -18,6 +18,9 @@ 
extern "C" {

#endif



#define SPDK_ACCEL_AES_XTS_128_KEY_SIZE 16

#define SPDK_ACCEL_AES_XTS_256_KEY_SIZE 32



/** Data Encryption Key identifier */

struct spdk_accel_crypto_key;

include/spdk/accel_module.h

+2 −2
Original line number Diff line number Diff line
@@ -178,9 +178,9 @@ struct spdk_accel_module_if { 
	bool (*crypto_supports_tweak_mode)(enum spdk_accel_crypto_tweak_mode tweak_mode);



	/**

	 * Returns true if given cipher is supported.

	 * Returns true if given pair (cipher, key size) is supported.

	 */

	bool (*crypto_supports_cipher)(enum spdk_accel_cipher cipher);

	bool (*crypto_supports_cipher)(enum spdk_accel_cipher cipher, size_t key_size);



	/**

	 * Returns memory domains supported by the module.  If NULL, the module does not support

lib/accel/accel.c

+3 −2
Original line number Diff line number Diff line
@@ -2205,8 +2205,9 @@ spdk_accel_crypto_key_create(const struct spdk_accel_crypto_key_create_param *pa 
		goto error;

	}



	if (!module->crypto_supports_cipher(key->cipher)) {

		SPDK_ERRLOG("Module %s doesn't support %s cipher\n", module->name, g_ciphers[key->cipher]);

	if (!module->crypto_supports_cipher(key->cipher, key->key_size)) {

		SPDK_ERRLOG("Module %s doesn't support %s cipher with %zu key size\n", module->name,

			    g_ciphers[key->cipher], key->key_size);

		rc = -EINVAL;

		goto error;

	}

lib/accel/accel_sw.c

+11 −10
Original line number Diff line number Diff line
@@ -25,9 +25,6 @@ 
#endif

#endif



#define ACCEL_AES_XTS_128_KEY_SIZE 16

#define ACCEL_AES_XTS_256_KEY_SIZE 32



/* Per the AES-XTS spec, the size of data unit cannot be bigger than 2^20 blocks, 128b each block */

#define ACCEL_AES_XTS_MAX_BLOCK_SIZE (1 << 24)
@@ -54,7 +51,7 @@ static struct spdk_accel_module_if g_sw_module; 
static void sw_accel_crypto_key_deinit(struct spdk_accel_crypto_key *_key);

static int sw_accel_crypto_key_init(struct spdk_accel_crypto_key *key);

static bool sw_accel_crypto_supports_tweak_mode(enum spdk_accel_crypto_tweak_mode tweak_mode);

static bool sw_accel_crypto_supports_cipher(enum spdk_accel_cipher cipher);

static bool sw_accel_crypto_supports_cipher(enum spdk_accel_cipher cipher, size_t key_size);



/* Post SW completions to a list and complete in a poller as we don't want to

 * complete them on the caller's stack as they'll likely submit another. */
@@ -628,17 +625,16 @@ sw_accel_create_aes_xts(struct spdk_accel_crypto_key *key) 
	}



	switch (key->key_size) {

	case ACCEL_AES_XTS_128_KEY_SIZE:

	case SPDK_ACCEL_AES_XTS_128_KEY_SIZE:

		key_data->encrypt = XTS_AES_128_enc;

		key_data->decrypt = XTS_AES_128_dec;

		break;

	case ACCEL_AES_XTS_256_KEY_SIZE:

	case SPDK_ACCEL_AES_XTS_256_KEY_SIZE:

		key_data->encrypt = XTS_AES_256_enc;

		key_data->decrypt = XTS_AES_256_dec;

		break;

	default:

		SPDK_ERRLOG("Incorrect key size  %zu, should be %d for AEX_XTS_128 or %d for AES_XTS_256\n",

			    key->key_size, ACCEL_AES_XTS_128_KEY_SIZE, ACCEL_AES_XTS_256_KEY_SIZE);

		assert(0);

		free(key_data);

		return -EINVAL;

	}
@@ -674,9 +670,14 @@ sw_accel_crypto_supports_tweak_mode(enum spdk_accel_crypto_tweak_mode tweak_mode 
}



static bool

sw_accel_crypto_supports_cipher(enum spdk_accel_cipher cipher)

sw_accel_crypto_supports_cipher(enum spdk_accel_cipher cipher, size_t key_size)

{

	return cipher == SPDK_ACCEL_CIPHER_AES_XTS;

	switch (cipher) {

	case SPDK_ACCEL_CIPHER_AES_XTS:

		return key_size == SPDK_ACCEL_AES_XTS_128_KEY_SIZE || key_size == SPDK_ACCEL_AES_XTS_256_KEY_SIZE;

	default:

		return false;

	}

}



SPDK_ACCEL_MODULE_REGISTER(sw, &g_sw_module)

module/accel/dpdk_cryptodev/accel_dpdk_cryptodev.c

+15 −46
Original line number Diff line number Diff line
@@ -79,8 +79,6 @@ 


/* Specific to AES_CBC. */

#define ACCEL_DPDK_CRYPTODEV_AES_CBC_KEY_LENGTH			16

#define ACCEL_DPDK_CRYPTODEV_AES_XTS_128_BLOCK_KEY_LENGTH	16 /* AES-XTS-128 block key size. */

#define ACCEL_DPDK_CRYPTODEV_AES_XTS_256_BLOCK_KEY_LENGTH	32 /* AES-XTS-256 block key size. */



/* Limit of the max memory len attached to mbuf - rte_pktmbuf_attach_extbuf has uint16_t `buf_len`

 * parameter, we use closes aligned value 32768 for better performance */
@@ -1394,47 +1392,6 @@ accel_dpdk_cryptodev_validate_parameters(enum accel_dpdk_cryptodev_driver_type d 
		return -1;

	}



	/* Check driver/cipher combinations and key lengths */

	switch (key->cipher) {

	case SPDK_ACCEL_CIPHER_AES_CBC:

		if (key->key_size != ACCEL_DPDK_CRYPTODEV_AES_CBC_KEY_LENGTH) {

			SPDK_ERRLOG("Invalid key size %zu for cipher %s, should be %d\n", key->key_size,

				    g_cipher_names[SPDK_ACCEL_CIPHER_AES_CBC], ACCEL_DPDK_CRYPTODEV_AES_CBC_KEY_LENGTH);

			return -1;

		}

		break;

	case SPDK_ACCEL_CIPHER_AES_XTS:

		switch (driver) {

		case ACCEL_DPDK_CRYPTODEV_DRIVER_MLX5_PCI:

			if (key->key_size != ACCEL_DPDK_CRYPTODEV_AES_XTS_128_BLOCK_KEY_LENGTH &&

			    key->key_size != ACCEL_DPDK_CRYPTODEV_AES_XTS_256_BLOCK_KEY_LENGTH) {

				SPDK_ERRLOG("Invalid key size %zu for driver %s, cipher %s, supported %d or %d\n",

					    key->key_size, g_driver_names[ACCEL_DPDK_CRYPTODEV_DRIVER_MLX5_PCI],

					    g_cipher_names[SPDK_ACCEL_CIPHER_AES_XTS],

					    ACCEL_DPDK_CRYPTODEV_AES_XTS_128_BLOCK_KEY_LENGTH,

					    ACCEL_DPDK_CRYPTODEV_AES_XTS_256_BLOCK_KEY_LENGTH);

				return -1;

			}

			break;

		case ACCEL_DPDK_CRYPTODEV_DRIVER_QAT:

		case ACCEL_DPDK_CRYPTODEV_DRIVER_AESNI_MB:

			if (key->key_size != ACCEL_DPDK_CRYPTODEV_AES_XTS_128_BLOCK_KEY_LENGTH) {

				SPDK_ERRLOG("Invalid key size %zu, supported %d\n", key->key_size,

					    ACCEL_DPDK_CRYPTODEV_AES_XTS_128_BLOCK_KEY_LENGTH);

				return -1;

			}

			break;

		default:

			SPDK_ERRLOG("Incorrect driver type %d\n", driver);

			assert(0);

			return -1;

		}

		break;

	default:

		assert(0);

		return -1;

	}



	return 0;

}
@@ -1460,14 +1417,26 @@ accel_dpdk_cryptodev_key_deinit(struct spdk_accel_crypto_key *key) 
}



static bool

accel_dpdk_cryptodev_supports_cipher(enum spdk_accel_cipher cipher)

accel_dpdk_cryptodev_supports_cipher(enum spdk_accel_cipher cipher, size_t key_size)

{

	switch (g_dpdk_cryptodev_driver) {

	case ACCEL_DPDK_CRYPTODEV_DRIVER_QAT:

	case ACCEL_DPDK_CRYPTODEV_DRIVER_AESNI_MB:

		return cipher == SPDK_ACCEL_CIPHER_AES_XTS || cipher == SPDK_ACCEL_CIPHER_AES_CBC;

		switch (cipher) {

		case SPDK_ACCEL_CIPHER_AES_XTS:

			return key_size == SPDK_ACCEL_AES_XTS_128_KEY_SIZE;

		case SPDK_ACCEL_CIPHER_AES_CBC:

			return key_size == ACCEL_DPDK_CRYPTODEV_AES_CBC_KEY_LENGTH;

		default:

			return false;

		}

	case ACCEL_DPDK_CRYPTODEV_DRIVER_MLX5_PCI:

		return cipher == SPDK_ACCEL_CIPHER_AES_XTS;

		switch (cipher) {

		case SPDK_ACCEL_CIPHER_AES_XTS:

			return key_size == SPDK_ACCEL_AES_XTS_128_KEY_SIZE || key_size == SPDK_ACCEL_AES_XTS_256_KEY_SIZE;

		default:

			return false;

		}

	default:

		return false;

	}