+104
−74
Loading
The generic transport layer still does a busy wait, but at least the logic in the PCIe transport now creates the queue pair asynchronously. Signed-off-by:Monica Kenguva <monica.kenguva@intel.com> Change-Id: I9669ccb81a90ee0a36d3f5512bc49c503923b293 Signed-off-by:
Ben Walker <benjamin.walker@intel.com> Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/8910 Community-CI: Mellanox Build Bot Community-CI: Broadcom CI <spdk-ci.pdl@broadcom.com> Tested-by:
SPDK CI Jenkins <sys_sgci@intel.com> Reviewed-by:
Jim Harris <james.r.harris@intel.com> Reviewed-by:
Aleksey Marchuk <alexeymar@mellanox.com>