Commit 39abf01e authored by Jim Harris's avatar Jim Harris Committed by Daniel Verkamp
Browse files

barrier.h: add spdk_rmb 



These are needed in some cases on x86 where a compiler
barrier is not sufficient - for example, ensuring an
rdtsc instruction has executed before subsequent
instructions.

Signed-off-by: default avatarJim Harris <james.r.harris@intel.com>
Change-Id: I339e2dd6138ccb11b1492e70f7c724976ef3038b

Reviewed-on: https://review.gerrithub.io/413145


Tested-by: default avatarSPDK Automated Test System <sys_sgsw@intel.com>
Reviewed-by: default avatarShuhei Matsumoto <shuhei.matsumoto.xt@hitachi.com>
Reviewed-by: default avatarBen Walker <benjamin.walker@intel.com>
Reviewed-by: default avatarDaniel Verkamp <daniel.verkamp@intel.com>
parent fafec18e

include/spdk/barrier.h

+12 −0
Original line number Diff line number Diff line
@@ -60,6 +60,18 @@ extern "C" { 
#error Unknown architecture

#endif



/** Read memory barrier */

#ifdef __PPC64__

#define spdk_rmb()	__asm volatile("lwsync" ::: "memory")

#elif defined(__aarch64__)

#define spdk_rmb()	__asm volatile("dsb lt" ::: "memory")

#elif defined(__i386__) || defined(__x86_64__)

#define spdk_rmb()	__asm volatile("lfence" ::: "memory")

#else

#define spdk_rmb()

#error Unknown architecture

#endif



/** Full read/write memory barrier */

#ifdef __PPC64__

#define spdk_mb()	__asm volatile("sync" ::: "memory")