Commit 38b931b2 authored by Shuhei Matsumoto's avatar Shuhei Matsumoto Committed by Jim Harris
Browse files

nvmf: Set bdev_ext_io_opts::dif_check_flags_exclude_mask for read/write 



Fill opts->dif_check_flags_exclude_mask when nvmf submits read or write
I/O to bdev layer. Furthremore, get CDW12 value for read I/O because it
has PRACT bit.

Signed-off-by: default avatarShuhei Matsumoto <smatsumoto@nvidia.com>
Change-Id: Icfa5b9c9b3ca8a0d6d9b08ba447e06ebe0986443
Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/23629


Community-CI: Community CI Samsung <spdk.community.ci.samsung@gmail.com>
Community-CI: Mellanox Build Bot
Reviewed-by: default avatarJim Harris <jim.harris@nvidia.com>
Reviewed-by: default avatarAleksey Marchuk <alexeymar@nvidia.com>
Tested-by: default avatarSPDK CI Jenkins <sys_sgci@intel.com>
parent 2f2acf4e

lib/nvmf/ctrlr_bdev.c

+7 −0
Original line number Diff line number Diff line
@@ -270,6 +270,12 @@ nvmf_bdev_ctrlr_get_rw_ext_params(const struct spdk_nvme_cmd *cmd, 


	/* Get CDW13 values */

	opts->nvme_cdw13.raw = from_le32(&cmd->cdw13);



	/* Bdev layer checks PRACT in CDW12 because it is NVMe specific, but

	 * it does not check DIF check flags in CDW because DIF is not NVMe

	 * specific. Hence, copy DIF check flags from CDW12 to dif_check_flags_exclude_mask.

	 */

	opts->dif_check_flags_exclude_mask = (~opts->nvme_cdw12.raw) & SPDK_NVME_IO_FLAGS_PRCHK_MASK;

}



static bool
@@ -350,6 +356,7 @@ nvmf_bdev_ctrlr_read_cmd(struct spdk_bdev *bdev, struct spdk_bdev_desc *desc, 
	int rc;



	nvmf_bdev_ctrlr_get_rw_params(cmd, &start_lba, &num_blocks);

	nvmf_bdev_ctrlr_get_rw_ext_params(cmd, &opts);



	if (spdk_unlikely(!nvmf_bdev_ctrlr_lba_in_range(bdev_num_blocks, start_lba, num_blocks))) {

		SPDK_ERRLOG("end of media\n");

test/unit/lib/nvmf/ctrlr_bdev.c/ctrlr_bdev_ut.c

+5 −2
Original line number Diff line number Diff line
@@ -361,11 +361,14 @@ test_get_rw_ext_params(void) 
	struct spdk_nvme_cmd cmd = {0};

	struct spdk_bdev_ext_io_opts opts = {0};



	to_le32(&cmd.cdw12, 0x9875 | SPDK_NVME_IO_FLAGS_DATA_PLACEMENT_DIRECTIVE);

	to_le32(&cmd.cdw12, 0x9875 | SPDK_NVME_IO_FLAGS_DATA_PLACEMENT_DIRECTIVE |

		SPDK_NVME_IO_FLAGS_PRCHK_GUARD);

	to_le32(&cmd.cdw13, 0x2 << 16);

	nvmf_bdev_ctrlr_get_rw_ext_params(&cmd, &opts);

	CU_ASSERT(opts.nvme_cdw12.raw == 0x209875);

	CU_ASSERT(opts.nvme_cdw12.raw == 0x10209875);

	CU_ASSERT(opts.nvme_cdw13.raw == 0x20000);

	CU_ASSERT((opts.dif_check_flags_exclude_mask ^ SPDK_NVME_IO_FLAGS_PRCHK_MASK)

		  == SPDK_NVME_IO_FLAGS_PRCHK_GUARD);

}



static void