Commit 1a2dc661 authored by PepperJo's avatar PepperJo Committed by Daniel Verkamp
Browse files

barrier: ppc64 memory barriers 



Introduce memory barriers for ppc64.

Change-Id: Ie51f959dd8d677f5af3ce6843e5304dd5e24a1e9
Signed-off-by: default avatarJonas Pfefferle <jpf@zurich.ibm.com>
Reviewed-on: https://review.gerrithub.io/383726


Reviewed-by: default avatarBen Walker <benjamin.walker@intel.com>
Reviewed-by: default avatarDariusz Stojaczyk <dariuszx.stojaczyk@intel.com>
Reviewed-by: default avatarDaniel Verkamp <daniel.verkamp@intel.com>
Tested-by: default avatarSPDK Automated Test System <sys_sgsw@intel.com>
parent 258c5ea4

include/spdk/barrier.h

+9 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
 *   BSD LICENSE

 *

 *   Copyright (c) Intel Corporation.

 *   Copyright (c) 2017, IBM Corporation.

 *   All rights reserved.

 *

 *   Redistribution and use in source and binary forms, with or without
@@ -48,10 +49,18 @@ extern "C" { 
#define spdk_compiler_barrier() __asm volatile("" ::: "memory")



/** Write memory barrier */

#ifdef __PPC64__

#define spdk_wmb()	__asm volatile("sync" ::: "memory")

#else

#define spdk_wmb()	__asm volatile("sfence" ::: "memory")

#endif



/** Full read/write memory barrier */

#ifdef __PPC64__

#define spdk_mb()	__asm volatile("sync" ::: "memory")

#else

#define spdk_mb()	__asm volatile("mfence" ::: "memory")

#endif



#ifdef __cplusplus

}